
Design Verification Lead, AI Hardware
Compensation
Salary undisclosedDescription
We are seeking a Verification Lead for our next-generation AI hardware. You’ll guide a top-tier team of Verification Engineers, shaping test strategies to validate functionality and performance of our AI core. This role requires expertise in AI-specific data types, common AI data-movement compute patterns, and on-chip network validation, combined with strong leadership and collaboration skills.
This role is hybrid, based out Toronto, ON.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Who You Are
- A Seasoned Verification Leader: An experienced ASIC/SoC lead with proven track record of leading teams through complex tape-outs.
- An AI Hardware Specialist: An expert in the nuances of high-performance compute, specifically focused on AI/ML architectures and the intricacies of tensor-based operations.
- A Systems Architect at Heart: A strategist who views verification through a system-level lens, ensuring that hardware, software, and on-chip networks (NoC) harmonize perfectly.
- A Technical Mentor: A hands-on guide proficient in UVM, SystemVerilog, and cocotb, dedicated to elevating team capabilities and driving rigorous coverage-driven methodologies.
What We Need
- Strategic AI Verification: Expertise in architecting verification plans for mixed-precision data types (FP8, BF16, INT8) and validating the accuracy of complex AI transformations.
- High-Performance NoC Expertise: Deep experience benchmarking on-chip networks under high-demand traffic, ensuring throughput, bandwidth, and congestion management meet peak requirements.
- Resiliency & Error Injection: A proactive approach to system stability, implementing robust concurrency controls and multi-core synchronization to handle edge-case failures.
- Platform-Agnostic Methodology: The ability to develop portable test strategies that scale seamlessly from subsystem-level simulations to FPGA and final Silicon.
- Cross-Functional Synergy: A collaborative mindset that bridges the gap between hardware architecture and software requirements to ensure performance targets are met.
What You Will Learn
- Next-Gen AI/ML Tooling: Integrating your specific advanced automation frameworks and emerging AI-driven verification techniques into the existing lifecycle.
- Evolving Workload Dynamics: Gaining a deeper understanding of your proprietary AI workloads and how they stress memory access patterns uniquely within your architecture.
- Project-Specific Performance Bottlenecks: Identifying and mastering the unique architectural constraints of your specific SoC to push bandwidth limits further.
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
Stack
- Posted
- Feb 24, 2025
- Last seen
- Jun 25, 2026
- First seen
- Jun 25, 2026
- Status
- active